[flashrom] "S25FL128S......0" on usbblaster_spi

[Liviu Toma]

Hello,

I had some success programming the Spansion "S25FL128S......0" with
usbblaster_spi (Altera USB blaster cheap clone).
The read function works OK. The write function fails the first time but if
I run it again it works the second time (this is consistent, I've done it
on 3 different chips). It appears the first time it does Erase then Write,
but only the erasing works. The second time it's already erased from the
first run and the write works OK.
Log attached.

Best regards,
Liviu Toma

[Stefan Tauner]

On Fri, 30 May 2014 22:00:59 -0400

Post by Liviu Toma
Hello,
I had some success programming the Spansion "S25FL128S......0" with
usbblaster_spi (Altera USB blaster cheap clone).
The read function works OK. The write function fails the first time but if
I run it again it works the second time (this is consistent, I've done it
on 3 different chips). It appears the first time it does Erase then Write,
but only the erasing works. The second time it's already erased from the
first run and the write works OK.
Log attached.

Hi Liviu,

each erased block is verified to contain 0xFF before it is tried to be
written. So the erase is successful when the W is printed. Now there
are two possibilities: either the writes did not work, or after a write
another delete undoes the write later. Can you please tell me the exact
S25FL128S model you have? There are many versions of the chip (as the
dots in the name suggests) and I presume that the problem is that the
current implementation is not compatible with all models.

[Liviu Toma]

Hi,

Thanks very much for the reply. Just to clarify, I am not concerned, I was
able to flash the chip. I was merely sending the info as instructed by the
tool.
The inscription on the chip read Spansion FL128PIF (the next line reads
92599012 but I assume that's some date / serial number).

Thanks,
Liviu


On Sat, May 31, 2014 at 11:35 AM, Stefan Tauner <

Post by Stefan Tauner
On Fri, 30 May 2014 22:00:59 -0400

Post by Liviu Toma
Hello,
I had some success programming the Spansion "S25FL128S......0" with
usbblaster_spi (Altera USB blaster cheap clone).
The read function works OK. The write function fails the first time but

if

Post by Liviu Toma
I run it again it works the second time (this is consistent, I've done it
on 3 different chips). It appears the first time it does Erase then

Write,

Post by Liviu Toma
but only the erasing works. The second time it's already erased from the
first run and the write works OK.
Log attached.

Hi Liviu,
each erased block is verified to contain 0xFF before it is tried to be
written. So the erase is successful when the W is printed. Now there
are two possibilities: either the writes did not work, or after a write
another delete undoes the write later. Can you please tell me the exact
S25FL128S model you have? There are many versions of the chip (as the
dots in the name suggests) and I presume that the problem is that the
current implementation is not compatible with all models.
--
Kind regards/Mit freundlichen GrÌßen, Stefan Tauner

[Stefan Tauner]

On Sat, 31 May 2014 13:14:08 -0400

Post by Liviu Toma
Hi,
Thanks very much for the reply. Just to clarify, I am not concerned, I was
able to flash the chip. I was merely sending the info as instructed by the
tool.

Oh, but I am ;) It should work at first try and this is a bug.

Post by Liviu Toma
The inscription on the chip read Spansion FL128PIF (the next line reads
92599012 but I assume that's some date / serial number).

Thank you very much. So it is actually the predecessor of S25FL128S,
namely the S25FL128P. I'll take a look at the differences/possible
problems and how/if the chips could be told apart by software. Would
you be able and willing to test a patch for that?

[Liviu Toma]

Absolutely, I will help any way I can.

Liviu

Post by Stefan Tauner
On Sat, 31 May 2014 13:14:08 -0400

Post by Liviu Toma
Hi,
Thanks very much for the reply. Just to clarify, I am not concerned, I

was

Post by Liviu Toma
able to flash the chip. I was merely sending the info as instructed by

the

Post by Liviu Toma
tool.

Oh, but I am ;) It should work at first try and this is a bug.

Post by Liviu Toma
The inscription on the chip read Spansion FL128PIF (the next line reads
92599012 but I assume that's some date / serial number).

Thank you very much. So it is actually the predecessor of S25FL128S,
namely the S25FL128P. I'll take a look at the differences/possible
problems and how/if the chips could be told apart by software. Would
you be able and willing to test a patch for that?
--
Kind regards/Mit freundlichen GrÌßen, Stefan Tauner

[Stefan Tauner]

S25FL128P is the predecessor family of S25FL128S. All these chips can
not be distinguished without EDI.

Additionally to the new S25FL128P chips, this patch also fixes the name of
the previously supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version as well.

Signed-off-by: Stefan Tauner <***@alumni.tuwien.ac.at>
---

Since flashrom can not distinguish the chips itself, the user has to
select the right chip with the -c parameter.

Liviu, please apply this patch on top of r1806 and run flashrom once
without any operation and without -c ....
E.g. flashrom -p usbblaster_spi -o probe.log

And a second time with the correct chip selected to write *different* data
to the chip.
E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c "S25FL128P......0"

Please report back with the two log files.

flashchips.c | 102 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++--
flashchips.h | 2 +-
2 files changed, 100 insertions(+), 4 deletions(-)

diff --git a/flashchips.c b/flashchips.c
index c830436..c731e38 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -9675,7 +9675,69 @@ const struct flashchip flashchips[] = {

{
.vendor = "Spansion",
- .name = "S25FL128S......0", /* uniform 256kB sectors */
+ .name = "S25FL128P......0", /* uniform 64 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp3_srwd,
+ .unlock = spi_disable_blockprotect_bp3_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read, /* Fast read (0x0B) supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128P......1", /* uniform 256kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_srwd,
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read, /* Fast read (0x0B) supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128S......0", /* hybrid 4 (top or bottom) + 64 kB sectors */
.bustype = BUS_SPI,
.manufacture_id = SPANSION_ID,
.model_id = SPANSION_S25FL128,
@@ -9689,9 +9751,43 @@ const struct flashchip flashchips[] = {
.probe_timing = TIMING_ZERO,
.block_erasers = {
{
- .eraseblocks = { {4 * 1024, 4096} },
- .block_erase = spi_block_erase_20,
+/* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors and D8h for remaining 64 kB sectors
+ .eraseblocks = {
+ {4 * 1024, 32},
+ {64 * 1024, 254},
+ },
+ .block_erase = NULL,
+ }, { */
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
}, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */
+ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128S......1", /* uniform 256 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 512,
+ /* supports 4B addressing */
+ /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
.eraseblocks = { {256 * 1024, 64} },
.block_erase = spi_block_erase_d8,
}, {
diff --git a/flashchips.h b/flashchips.h
index 5fce532..2a5e84c 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -564,7 +564,7 @@
#define SPANSION_S25FL016A 0x0214
#define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */
#define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */
-#define SPANSION_S25FL128 0x2018
+#define SPANSION_S25FL128 0x2018 /* Same ID for various S25FL128P, S25FL128S and S25FL129P (including dual-die S70FL256P) variants (EDI supported) */
#define SPANSION_S25FL256 0x0219
#define SPANSION_S25FL512 0x0220
#define SPANSION_S25FL204 0x4013

[Stefan Tauner]

On Sat, 31 May 2014 23:07:35 +0200

Post by Stefan Tauner
S25FL128P is the predecessor family of S25FL128S. All these chips can
not be distinguished without EDI.
Additionally to the new S25FL128P chips, this patch also fixes the name of
the previously supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version as well.
---
Since flashrom can not distinguish the chips itself, the user has to
select the right chip with the -c parameter.
Liviu, please apply this patch on top of r1806 and run flashrom once
without any operation and without -c ....
E.g. flashrom -p usbblaster_spi -o probe.log
And a second time with the correct chip selected to write *different* data
to the chip.
E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c "S25FL128P......0"
Please report back with the two log files.

Hi Liviu,

are you gonna test this patch? If not I would like to commit it
untested so that it does not become outdated.

[Liviu Toma]

Hi Stefan,

I apologize I didn't have a chance to try it. I am just trying it now, I
will report a bit later

Liviu


On Thu, Jun 12, 2014 at 7:00 PM, Stefan Tauner <

Post by Stefan Tauner
On Sat, 31 May 2014 23:07:35 +0200

Post by Stefan Tauner
S25FL128P is the predecessor family of S25FL128S. All these chips can
not be distinguished without EDI.
Additionally to the new S25FL128P chips, this patch also fixes the name

of

Post by Stefan Tauner
the previously supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version as well.
---
Since flashrom can not distinguish the chips itself, the user has to
select the right chip with the -c parameter.
Liviu, please apply this patch on top of r1806 and run flashrom once
without any operation and without -c ....
E.g. flashrom -p usbblaster_spi -o probe.log
And a second time with the correct chip selected to write *different*

data

Post by Stefan Tauner
to the chip.
E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c

"S25FL128P......0"

Post by Stefan Tauner
Please report back with the two log files.

Hi Liviu,
are you gonna test this patch? If not I would like to commit it
untested so that it does not become outdated.
--
Kind regards/Mit freundlichen GrÌßen, Stefan Tauner

[Liviu Toma]

Here are the two files requested. The process failed, so I will try -c
"S25FL128P......1" and send you another log (it takes quite long, so
probably in an hour or so)

Liviu

Post by Liviu Toma
Hi Stefan,
I apologize I didn't have a chance to try it. I am just trying it now, I
will report a bit later
Liviu
On Thu, Jun 12, 2014 at 7:00 PM, Stefan Tauner <

Post by Stefan Tauner
On Sat, 31 May 2014 23:07:35 +0200

Post by Stefan Tauner
S25FL128P is the predecessor family of S25FL128S. All these chips can
not be distinguished without EDI.
Additionally to the new S25FL128P chips, this patch also fixes the name

of

Post by Stefan Tauner
the previously supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version as well.
---
Since flashrom can not distinguish the chips itself, the user has to
select the right chip with the -c parameter.
Liviu, please apply this patch on top of r1806 and run flashrom once
without any operation and without -c ....
E.g. flashrom -p usbblaster_spi -o probe.log
And a second time with the correct chip selected to write *different*

data

Post by Stefan Tauner
to the chip.
E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c

"S25FL128P......0"

Post by Stefan Tauner
Please report back with the two log files.

Hi Liviu,
are you gonna test this patch? If not I would like to commit it
untested so that it does not become outdated.
--
Kind regards/Mit freundlichen GrÌßen, Stefan Tauner

[Liviu Toma]

This is the write log with -c "S25FL128P......1"

Post by Liviu Toma
Here are the two files requested. The process failed, so I will try -c
"S25FL128P......1" and send you another log (it takes quite long, so
probably in an hour or so)
Liviu

Post by Liviu Toma
Hi Stefan,
I apologize I didn't have a chance to try it. I am just trying it now, I
will report a bit later
Liviu
On Thu, Jun 12, 2014 at 7:00 PM, Stefan Tauner <

Post by Stefan Tauner
On Sat, 31 May 2014 23:07:35 +0200

Post by Stefan Tauner
S25FL128P is the predecessor family of S25FL128S. All these chips can
not be distinguished without EDI.
Additionally to the new S25FL128P chips, this patch also fixes the

name of

Post by Stefan Tauner
the previously supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version as well.
---
Since flashrom can not distinguish the chips itself, the user has to
select the right chip with the -c parameter.
Liviu, please apply this patch on top of r1806 and run flashrom once
without any operation and without -c ....
E.g. flashrom -p usbblaster_spi -o probe.log
And a second time with the correct chip selected to write *different*

data

Post by Stefan Tauner
to the chip.
E.g. flashrom -p usbblaster_spi -o write.log -w newdata.bin -c

"S25FL128P......0"

Post by Stefan Tauner
Please report back with the two log files.

Hi Liviu,
are you gonna test this patch? If not I would like to commit it
untested so that it does not become outdated.
--
Kind regards/Mit freundlichen GrÌßen, Stefan Tauner

[Stefan Tauner]

Thanks for the test, there are two issues here. One is that I swapped
the erase block sizes of the P models. This is clearly shown in your
logs.

Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! Expected=0xff, Found=0xe5

0x03ffff is 262143 in decimal... I have fixed that locally, but this is
not the main problem here.

The chip erase and the subsequent write should have worked, and your
second try with the definition of the ...1 model too (because it
contains the right block size). But both failed and I don't understand
why yet. The first failed byte is equal in both cases but not all of
them are (a different number of bytes fail in the two cases). This
indicates that the behavior might be indeterministic. The contents of
the "rog.bin" file were equal for both tries, right?
What happens if you retry the second test again?
/usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c S25FL128P......1 -w rog.bin
If you can not reproduce exactly the same output, i.e.
Verifying flash... FAILED at 0x0000005b! Expected=0xd3, Found=0xfb, failed byte count from 0x00000000-0x00ffffff: 0xaf66ea
Then we are on the right track. In that case I would ask you how the
chip is connected exactly, especially how WP# and HOLD# are driven.

PS: You dont need to install flashrom after recompiling. You can
execute the built binary in the source directory (make; ./flashrom ...).

[Liviu Toma]

Hi Stefan,

Thanks, I will test again tonight when I get home. The content of the
rog.bin was the same for both attempts.

Liviu


On Fri, Jun 13, 2014 at 4:41 AM, Stefan Tauner <

Post by Stefan Tauner
Thanks for the test, there are two issues here. One is that I swapped
the erase block sizes of the P models. This is clearly shown in your
logs.

Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000!

Expected=0xff, Found=0xe5
0x03ffff is 262143 in decimal... I have fixed that locally, but this is
not the main problem here.
The chip erase and the subsequent write should have worked, and your
second try with the definition of the ...1 model too (because it
contains the right block size). But both failed and I don't understand
why yet. The first failed byte is equal in both cases but not all of
them are (a different number of bytes fail in the two cases). This
indicates that the behavior might be indeterministic. The contents of
the "rog.bin" file were equal for both tries, right?
What happens if you retry the second test again?
/usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c
S25FL128P......1 -w rog.bin
If you can not reproduce exactly the same output, i.e.
Verifying flash... FAILED at 0x0000005b! Expected=0xd3, Found=0xfb, failed
byte count from 0x00000000-0x00ffffff: 0xaf66ea
Then we are on the right track. In that case I would ask you how the
chip is connected exactly, especially how WP# and HOLD# are driven.
PS: You dont need to install flashrom after recompiling. You can
execute the built binary in the source directory (make; ./flashrom ...).
--
Kind regards/Mit freundlichen GrÌßen, Stefan Tauner

[Liviu Toma]

I re-seated my test clips and I tried again. The results were quite strange:


*With the patched flashrom, using S25FL128P......1#
/usr/src/flashrompatch/flashrom -p usbblaster_spi -o write1.log -c
"S25FL128P......1" -w rog.bin*
flashrom v0.9.7-r1806 on Linux 3.2.0-4-686-pae (i686)
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.


*With the patched flashrom using S25FL128P......0#
/usr/src/flashrompatch/flashrom -p usbblaster_spi -o write1.log -c
"S25FL128P......0" -w rog.bin*
flashrom v0.9.7-r1806 on Linux 3.2.0-4-686-pae (i686)
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
Found Spansion flash chip "S25FL128P......0" (16384 kB, SPI) on
usbblaster_spi.
===
This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to ***@flashrom.org if any of the above
operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-VE, -Vw), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Reading old flash chip contents... done.
Erasing and writing flash chip... FAILED at 0x00000000! Expected=0xff,
Found=0x00, failed byte count from 0x00000000-0x0003ffff: 0x3
ERASE FAILED!
Reading current flash chip contents... done. Erase/write done.
Verifying flash... FAILED at 0x00000000! Expected=0xea, Found=0x00, failed
byte count from 0x00000000-0x00ffffff: 0xeff72f
Your flash chip is in an unknown state.
Please report this on IRC at chat.freenode.net (channel #flashrom) or
mail ***@flashrom.org, thanks!

*With the patched flashrom using S25FL128P......1 again*

*# /usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c
"S25FL128P......1" -w rog.bin*flashrom v0.9.7-r1806 on Linux
3.2.0-4-686-pae (i686)
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
Found Spansion flash chip "S25FL128P......1" (16384 kB, SPI) on
usbblaster_spi.
===
This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to ***@flashrom.org if any of the above
operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-VE, -Vw), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Reading old flash chip contents... done.
Erasing and writing flash chip... Erase/write done.
*Verifying flash... VERIFIED.*

This seems quite random, so I am not sure what's going on.
Before the first operation, I did a full erase, would the detect not work
if the chip is erased ?

Liviu

Post by Liviu Toma
Hi Stefan,
Thanks, I will test again tonight when I get home. The content of the
rog.bin was the same for both attempts.
Liviu
On Fri, Jun 13, 2014 at 4:41 AM, Stefan Tauner <

Post by Stefan Tauner
Thanks for the test, there are two issues here. One is that I swapped
the erase block sizes of the P models. This is clearly shown in your
logs.

Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000!

Expected=0xff, Found=0xe5
0x03ffff is 262143 in decimal... I have fixed that locally, but this is
not the main problem here.
The chip erase and the subsequent write should have worked, and your
second try with the definition of the ...1 model too (because it
contains the right block size). But both failed and I don't understand
why yet. The first failed byte is equal in both cases but not all of
them are (a different number of bytes fail in the two cases). This
indicates that the behavior might be indeterministic. The contents of
the "rog.bin" file were equal for both tries, right?
What happens if you retry the second test again?
/usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c
S25FL128P......1 -w rog.bin
If you can not reproduce exactly the same output, i.e.
Verifying flash... FAILED at 0x0000005b! Expected=0xd3, Found=0xfb,
failed byte count from 0x00000000-0x00ffffff: 0xaf66ea
Then we are on the right track. In that case I would ask you how the
chip is connected exactly, especially how WP# and HOLD# are driven.
PS: You dont need to install flashrom after recompiling. You can
execute the built binary in the source directory (make; ./flashrom ...).
--
Kind regards/Mit freundlichen GrÌßen, Stefan Tauner

[Stefan Tauner]

On Sat, 14 Jun 2014 13:50:49 -0400

Post by Liviu Toma
This seems quite random, so I am not sure what's going on.

I think that is exactly what is going on: broken communication that
results in random outages and this "funny" behavior.

Post by Liviu Toma
Before the first operation, I did a full erase, would the detect not work
if the chip is erased ?

No, that has nothing to do with each other.

Post by Liviu Toma

Post by Stefan Tauner
In that case I would ask you how the
chip is connected exactly, especially how WP# and HOLD# are driven.

It is very important that all input pins of the flash chip are
connected to a defined level but many people dont know that. Is it
well connected in your case? Noise on an unconnected hold pin is about
the number one of reasons for such erratic behavior.

[Antonio Ospite]

On Fri, 13 Jun 2014 10:41:39 +0200

Post by Stefan Tauner
Thanks for the test, there are two issues here. One is that I swapped
the erase block sizes of the P models. This is clearly shown in your
logs.

Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! Expected=0xff, Found=0xe5

0x03ffff is 262143 in decimal... I have fixed that locally, but this is
not the main problem here.

Hi Stefan, can please you send the fixed up patch for that?
I can test it with a S25FL129P1.

Thanks,
Antonio

[Antonio Ospite]

On Sun, 29 Jun 2014 13:29:00 +0200

Post by Antonio Ospite
On Fri, 13 Jun 2014 10:41:39 +0200

Post by Stefan Tauner
Thanks for the test, there are two issues here. One is that I swapped
the erase block sizes of the P models. This is clearly shown in your
logs.

Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! Expected=0xff, Found=0xe5

0x03ffff is 262143 in decimal... I have fixed that locally, but this is
not the main problem here.

Hi Stefan, can please you send the fixed up patch for that?
I can test it with a S25FL129P1.

OK, I fixed up the sizes myself, here are the write tests attached.

Before each run I create data.bin with:
dd if=/dev/urandom count=$((16 * 1024 * 1024)) iflag=count_bytes of=data.bin

Note that I have a S25FL129P......0, not S25FL128P......0, for me
spi_block_erase_20 does not work at 64kB, but spi_block_erase_d8 does.

This is because on S25FL129P......0 spi_block_erase_20 is used for the 4kB
access.

If you send an updated version of the patch I can do more tests.

Thanks,
Antonio

[Stefan Tauner]

Additionally to the existing S25FL128S......0 definition this patch
adds S25FL128P......0, S25FL128P......1 and S25FL128S......1, as well as
S25FL129P......0 and S25FL129P......1 definitions.
S25FL12xP seem to be the predecessor families of S25FL128S. All
associated chips can not be distinguished with RDID alone.

Besides the new chips, this patch also fixes the name of the previously
supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version (0) as well.

Due to the shared IDs the user has to select the right chip manually
with the -c parameter. To make this even possible, this patch enlarges
the respective array for results to 6.

Signed-off-by: Stefan Tauner <***@alumni.tuwien.ac.at>
---
cli_classic.c | 2 +-
flashchips.c | 182 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
flashchips.h | 2 +-
3 files changed, 181 insertions(+), 5 deletions(-)

diff --git a/cli_classic.c b/cli_classic.c
index ee988a3..60b8b88 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -94,7 +94,7 @@ int main(int argc, char *argv[])
unsigned long size;
/* Probe for up to three flash chips. */
const struct flashchip *chip = NULL;
- struct flashctx flashes[3] = {{0}};
+ struct flashctx flashes[6] = {{0}};
struct flashctx *fill_flash;
const char *name;
int namelen, opt, i, j;
diff --git a/flashchips.c b/flashchips.c
index a1166e0..e587b28 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10389,7 +10389,69 @@ const struct flashchip flashchips[] = {

{
.vendor = "Spansion",
- .name = "S25FL128S......0", /* uniform 256kB sectors */
+ .name = "S25FL128P......0", /* uniform 64 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp3_srwd,
+ .unlock = spi_disable_blockprotect_bp3_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read, /* Fast read (0x0B) supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128P......1", /* uniform 256kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_srwd,
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read, /* Fast read (0x0B) supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128S......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
.bustype = BUS_SPI,
.manufacture_id = SPANSION_ID,
.model_id = SPANSION_S25FL128,
@@ -10403,9 +10465,46 @@ const struct flashchip flashchips[] = {
.probe_timing = TIMING_ZERO,
.block_erasers = {
{
- .eraseblocks = { {4 * 1024, 4096} },
- .block_erase = spi_block_erase_20,
+ /* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors only
+ .eraseblocks = {
+ {4 * 1024, 32},
+ {64 * 1024, 254}, // NOP
+ },
+ .block_erase = NULL,
+ }, { */
+ .eraseblocks = { { 64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
}, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */
+ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128S......1", /* uniform 256 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 512,
+ /* supports 4B addressing */
+ /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
.eraseblocks = { {256 * 1024, 64} },
.block_erase = spi_block_erase_d8,
}, {
@@ -10422,6 +10521,83 @@ const struct flashchip flashchips[] = {
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
},
+ {
+ .vendor = "Spansion",
+ .name = "S25FL129P......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ /* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ /* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors only
+ .eraseblocks = {
+ {4 * 1024, 32},
+ {64 * 1024, 254}, // NOP
+ },
+ .block_erase = NULL,
+ }, { */
+ /* FIXME: erase opcodes 40h for (top or bottom) 2*4 kB parameter sectors only
+ .eraseblocks = {
+ {8 * 1024, 16},
+ {64 * 1024, 254}, // NOP
+ },
+ .block_erase = NULL,
+ }, { */
+ .eraseblocks = { { 64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: Configuration register */
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128P......1", /* uniform 256 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 512,
+ /* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: Configuration register */
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },

{
.vendor = "SST",
diff --git a/flashchips.h b/flashchips.h
index 029bae8..b2c1d4d 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -590,7 +590,7 @@
#define SPANSION_S25FL016A 0x0214
#define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */
#define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */
-#define SPANSION_S25FL128 0x2018
+#define SPANSION_S25FL128 0x2018 /* Same ID for various S25FL128P, S25FL128S and S25FL129P (including dual-die S70FL256P) variants (EDI supported) */
#define SPANSION_S25FL256 0x0219
#define SPANSION_S25FL512 0x0220
#define SPANSION_S25FL204 0x4013

[Antonio Ospite]

On Mon, 4 Aug 2014 00:46:55 +0200

Post by Stefan Tauner
Additionally to the existing S25FL128S......0 definition this patch
adds S25FL128P......0, S25FL128P......1 and S25FL128S......1, as well as
S25FL129P......0 and S25FL129P......1 definitions.
S25FL12xP seem to be the predecessor families of S25FL128S. All
associated chips can not be distinguished with RDID alone.
Besides the new chips, this patch also fixes the name of the previously
supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version (0) as well.
Due to the shared IDs the user has to select the right chip manually
with the -c parameter. To make this even possible, this patch enlarges
the respective array for results to 6.

Hi Stefan, the chip I've got is a S25FL129P......0, logs attached and
some comments inlined below.

Thanks.

Post by Stefan Tauner
---
cli_classic.c | 2 +-
flashchips.c | 182 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
flashchips.h | 2 +-
3 files changed, 181 insertions(+), 5 deletions(-)
diff --git a/cli_classic.c b/cli_classic.c
index ee988a3..60b8b88 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -94,7 +94,7 @@ int main(int argc, char *argv[])
unsigned long size;
/* Probe for up to three flash chips. */
const struct flashchip *chip = NULL;
- struct flashctx flashes[3] = {{0}};
+ struct flashctx flashes[6] = {{0}};
struct flashctx *fill_flash;
const char *name;
int namelen, opt, i, j;
diff --git a/flashchips.c b/flashchips.c
index a1166e0..e587b28 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10389,7 +10389,69 @@ const struct flashchip flashchips[] = {
{
.vendor = "Spansion",
- .name = "S25FL128S......0", /* uniform 256kB sectors */
+ .name = "S25FL128P......0", /* uniform 64 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp3_srwd,
+ .unlock = spi_disable_blockprotect_bp3_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read, /* Fast read (0x0B) supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128P......1", /* uniform 256kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_srwd,
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read, /* Fast read (0x0B) supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128S......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
.bustype = BUS_SPI,
.manufacture_id = SPANSION_ID,
.model_id = SPANSION_S25FL128,
@@ -10403,9 +10465,46 @@ const struct flashchip flashchips[] = {
.probe_timing = TIMING_ZERO,
.block_erasers = {
{
- .eraseblocks = { {4 * 1024, 4096} },
- .block_erase = spi_block_erase_20,
+ /* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors only
+ .eraseblocks = {
+ {4 * 1024, 32},
+ {64 * 1024, 254}, // NOP
+ },
+ .block_erase = NULL,
+ }, { */
+ .eraseblocks = { { 64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
}, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */
+ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128S......1", /* uniform 256 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 512,
+ /* supports 4B addressing */
+ /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
.eraseblocks = { {256 * 1024, 64} },
.block_erase = spi_block_erase_d8,
}, {
@@ -10422,6 +10521,83 @@ const struct flashchip flashchips[] = {
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
},
+ {
+ .vendor = "Spansion",
+ .name = "S25FL129P......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ /* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,

Probe and read work, and I tested write for all the supported
block_erasers, each time with random data generated with:

dd if=/dev/urandom count=$((16 * 1024 * 1024)) iflag=count_bytes of=random_data.bin

Post by Stefan Tauner
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ /* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors only
+ .eraseblocks = {
+ {4 * 1024, 32},

I also wanted to understand this "parameter sub-sector" thing a little
better, it was not obvious to me what "(top or bottom)" meant in this
context. Then I realized than sometimes these parameter sub-subsectors
are at the start of the chip, sometimes they are at the end.

Anyway, spi_block_erase_20 works with these 4KiB sub-sectors on the
first two 64KiB sectors (i.e. up to 0x01f000-0x01ffff):

... 0x01f000-0x01ffff:EW, 0x020000-0x02ffff:EFAILED ...

Just toe xperiment, I even tried to enable 4KiB sub-sectors for the
whole flash but verification fails on the third 64KiB sector.

... 0x01f000-0x01ffff:EW, 0x020000-0x020fff:EFAILED ...

Post by Stefan Tauner
+ {64 * 1024, 254}, // NOP

as said verification fails here with spi_block_erase_20, is this because
spi_block_erase_20 is a NOP from the third 64KiB sector on? If so, maybe
the comment is a little too essential, it becomes clear only after you
_know_ that it refers to opcode 20h.

Maybe the comments can be modeled after the similar ones for some Intel
chips (e.g. "25F160S33B8")?

So if someone wanted to make this work should flashrom be changed so
that it'd be possible to specify different eraser functions for
different flash regions? Just curios.

Post by Stefan Tauner
+ },
+ .block_erase = NULL,

mention spi_block_erase_20 here and spi_block_erase_40 in the following item?

Post by Stefan Tauner
+ }, { */
+ /* FIXME: erase opcodes 40h for (top or bottom) 2*4 kB parameter sectors only
+ .eraseblocks = {
+ {8 * 1024, 16},
+ {64 * 1024, 254}, // NOP
+ },
+ .block_erase = NULL,

I didn't play with this, because there's no spi_block_erase_40, but
I guess the results would be consistent with the 4KiB blocks.

Post by Stefan Tauner
+ }, { */
+ .eraseblocks = { { 64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,

This one is OK.

Post by Stefan Tauner
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,

This one is OK.

Post by Stefan Tauner
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,

This one is OK.

Post by Stefan Tauner
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: Configuration register */
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128P......1", /* uniform 256 kB sectors */

^
This should be "S25FL129P......1".

Post by Stefan Tauner
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 512,
+ /* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: Configuration register */
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
{
.vendor = "SST",
diff --git a/flashchips.h b/flashchips.h
index 029bae8..b2c1d4d 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -590,7 +590,7 @@
#define SPANSION_S25FL016A 0x0214
#define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */
#define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */
-#define SPANSION_S25FL128 0x2018
+#define SPANSION_S25FL128 0x2018 /* Same ID for various S25FL128P, S25FL128S and S25FL129P (including dual-die S70FL256P) variants (EDI supported) */
#define SPANSION_S25FL256 0x0219
#define SPANSION_S25FL512 0x0220
#define SPANSION_S25FL204 0x4013
--
Kind regards, Stefan Tauner

[Stefan Tauner]

On Wed, 6 Aug 2014 13:52:19 +0200

Post by Antonio Ospite
On Mon, 4 Aug 2014 00:46:55 +0200

Post by Stefan Tauner
Additionally to the existing S25FL128S......0 definition this patch
adds S25FL128P......0, S25FL128P......1 and S25FL128S......1, as well as
S25FL129P......0 and S25FL129P......1 definitions.
S25FL12xP seem to be the predecessor families of S25FL128S. All
associated chips can not be distinguished with RDID alone.
Besides the new chips, this patch also fixes the name of the previously
supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version (0) as well.
Due to the shared IDs the user has to select the right chip manually
with the -c parameter. To make this even possible, this patch enlarges
the respective array for results to 6.

Hi Stefan, the chip I've got is a S25FL129P......0, logs attached and
some comments inlined below.
Thanks.

Post by Stefan Tauner
---
cli_classic.c | 2 +-
flashchips.c | 182 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
flashchips.h | 2 +-
3 files changed, 181 insertions(+), 5 deletions(-)

[…]

Post by Antonio Ospite

Post by Stefan Tauner
diff --git a/flashchips.c b/flashchips.c
index a1166e0..e587b28 100644
--- a/flashchips.c
+++ b/flashchips.c

[…]

Post by Antonio Ospite

Post by Stefan Tauner
@@ -10422,6 +10521,83 @@ const struct flashchip flashchips[] = {
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
},
+ {

fixed this missing empty line here as well...

Post by Antonio Ospite

Post by Stefan Tauner
+ .vendor = "Spansion",
+ .name = "S25FL129P......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128,
+ .total_size = 16384,
+ .page_size = 256,
+ /* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,

Probe and read work, and I tested write for all the supported
dd if=/dev/urandom count=$((16 * 1024 * 1024)) iflag=count_bytes of=random_data.bin

great.

Post by Antonio Ospite

Post by Stefan Tauner
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers = {
+ {
+ /* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors only
+ .eraseblocks = {
+ {4 * 1024, 32},

I also wanted to understand this "parameter sub-sector" thing a little
better, it was not obvious to me what "(top or bottom)" meant in this
context. Then I realized than sometimes these parameter sub-subsectors
are at the start of the chip, sometimes they are at the end.
Anyway, spi_block_erase_20 works with these 4KiB sub-sectors on the
... 0x01f000-0x01ffff:EW, 0x020000-0x02ffff:EFAILED ...
Just toe xperiment, I even tried to enable 4KiB sub-sectors for the
whole flash but verification fails on the third 64KiB sector.
... 0x01f000-0x01ffff:EW, 0x020000-0x020fff:EFAILED ...

Post by Stefan Tauner
+ {64 * 1024, 254}, // NOP

as said verification fails here with spi_block_erase_20, is this because
spi_block_erase_20 is a NOP from the third 64KiB sector on? If so, maybe
the comment is a little too essential, it becomes clear only after you
_know_ that it refers to opcode 20h.
Maybe the comments can be modeled after the similar ones for some Intel
chips (e.g. "25F160S33B8")?

Definitely... I knew that there were other chips with similar
semantics, but I forgot about these very similar chips. Thanks for the
pointer.

Post by Antonio Ospite
So if someone wanted to make this work should flashrom be changed so
that it'd be possible to specify different eraser functions for
different flash regions? Just curios.

Yes, exactly, or alternatively to annotate only a part of the blocks as
affected. It is quite unlikely that either is implemented soonish...
unless someone unexpectedly steps up to do it ;)

Post by Antonio Ospite

Post by Stefan Tauner
+ },
+ .block_erase = NULL,

mention spi_block_erase_20 here and spi_block_erase_40 in the following item?

like for the intel chips, yes...

Post by Antonio Ospite

Post by Stefan Tauner
+ }, { */
+ /* FIXME: erase opcodes 40h for (top or bottom) 2*4 kB parameter sectors only
+ .eraseblocks = {
+ {8 * 1024, 16},
+ {64 * 1024, 254}, // NOP
+ },
+ .block_erase = NULL,

I didn't play with this, because there's no spi_block_erase_40, but
I guess the results would be consistent with the 4KiB blocks.

hopefully, else flashrom or the chips or their documentation are
faulty :)

Post by Antonio Ospite

Post by Stefan Tauner
+ }, { */
+ .eraseblocks = { { 64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,

This one is OK.

Post by Stefan Tauner
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,

This one is OK.

Post by Stefan Tauner
+ }, {
+ .eraseblocks = { { 16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,

This one is OK.

Post by Stefan Tauner
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: Configuration register */
+ .unlock = spi_disable_blockprotect_bp2_srwd,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128P......1", /* uniform 256 kB sectors */

^
This should be "S25FL129P......1".

Thanks


I have refined and committed this patch in r1838, thanks for the very
thorough review!